Acquisition Paths

WaveLink has two entirely different ways of turning a voltage into a number. They differ in resolution, in speed, and — critically — in which operating modes they are available in.

The 16-bit SAR

Successive approximation, implemented in firmware around an LM393 comparator.

The signal DAC proposes a reference voltage; the comparator answers whether the input is above or below it; the firmware keeps the answer as one bit and proposes a better guess. Sixteen questions, sixteen bits.


Resolution	16 bits — 76 µV at the converter node
Referred to input, unity chain gain	~ 0.77 mV
Time per bit	~13.5 µs
Time per sample	216 µs (~4.6 kSa/s conversion rate)
Available in	Oscilloscope mode only

The mode restriction is not arbitrary. The reference the comparator compares against is CH1’s signal DAC — the same converter the synthesiser writes on every DDS tick. The SAR routine has to walk that DAC bit by bit, and it cannot do that while a synthesiser is also writing to it. Oscilloscope mode stops the DDS entirely, which is precisely what frees the DAC.

Ask for a SAR capture in any other mode and the board replies -4.

The internal 10-bit ADC

The ATmega32A’s own successive-approximation ADC on an input pin. It touches no DAC at all, which is why it is the path that works while the instrument is generating.


Resolution	10 bits — 4.88 mV at the converter node
Conversion	13 ADC clocks
At Div32 prescaler	26 µs per sample (~38 kSa/s)
At Div16 prescaler	13 µs per sample (~77 kSa/s)
Available in	Oscilloscope mode and CH2 Generator + Scope mode

The Div16 setting roughly doubles the sample rate by running the ADC clock faster than the part’s specified range. It is noticeably noisier than Div32 — this is genuine degradation of the conversion, not a clean truncation of bits. Use it when you need the rate and can tolerate the noise.

Choosing between them

Situation	Path
Highest resolution, nothing being generated	SAR
Generating and measuring at once (Mode 3)	Internal ADC — the only option
Fast bursts, resolution secondary	Internal ADC

The app can select the method explicitly, and Autoset and the capture controls will fall back to the internal ADC automatically in modes where the SAR is not available. A SAR control greyed out in Mode 3 is the app telling you the truth about the hardware, not a limitation of the software.

Capture depth


Samples per burst	up to 1000
Display buffer held by the app	4096 samples

The board captures a burst and streams it; the app keeps a rolling 4096-sample buffer so you can scroll back through more than one burst’s worth of history and so that post-capture triggering has material to work with.

The honest caveat about speed

The conversion rates above are what the converters achieve. They are not what you will observe end to end. Actual throughput is limited by the wireless link, not by the converters.

The link runs at 115200 baud and sustains roughly 1.1 k samples per second in the default ASCII sample format. The SAR converts at about 4.6 kSa/s and the internal ADC at up to 77 kSa/s. The link is therefore still the bottleneck, and no choice of acquisition path changes that.

What does change it is the capture format tier: a compact binary sample encoding replaces the variable-length ASCII line with a fixed-length frame, taking the same link from ~1.1 kSa/s to ~3.5 kSa/s. The link rate itself is fixed and is not a control you have.

There is also an AUTO setting, which picks the highest-precision format that can still finish the requested burst inside the timeout. If you are capturing a small number of samples it will keep full precision; ask for a large burst and it will drop to the faster format rather than let the capture time out.

See Link and Throughput for the format tiers in full.

Why a large capture times out

If you request many samples in the full-precision format, the burst cannot finish inside the timeout window. The fix is one of: fewer samples, the compact binary format, or AUTO. This is not a fault condition — it is arithmetic, and it is covered in Troubleshooting.